======================================================================== 74F534 OCTAL D-TYPE FLIP-FLOP (3-STATE OUTPUTS) ======================================================================== Family: Fairchild FAST (Advanced Schottky TTL) Source: 1980 Fairchild FAST Data Book, pages 4-110 ... 4-111 Status: PRELIMINARY -- page 4-110 carries a "Preliminary" watermark. Ratings: Vcc = +5.0 V +/-5%, TA = 0 to +70 deg C DESCRIPTION ----------- The 'F534 is a high speed, low power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A buffered Clock (CP) and Output Enable (/OE) are common to all flip-flops. The 'F534 is the same as the 'F374 except that the outputs are inverted. o EDGE-TRIGGERED D-TYPE INPUTS o BUFFERED POSITIVE EDGE-TRIGGERED CLOCK o 3-STATE OUTPUTS FOR BUS ORIENTED APPLICATIONS FUNCTIONAL DESCRIPTION ---------------------- The 'F534 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-state true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (/OE) LOW, the contents of the eight flip-flops are available at the outputs. When /OE is HIGH, the outputs go to the high impedance state. Operation of the /OE input does not affect the state of the flip-flops. CONNECTION DIAGRAM (20-pin DIP) ------------------------------- Pin Function Pin Function --- --------------------------- --- ------------------------------------- 1 /OE 3-State Output Enable 20 Vcc 2 /O0 Complementary output 0 19 /O7 Complementary output 7 3 D0 Data input 0 18 D7 Data input 7 4 D1 Data input 1 17 D6 Data input 6 5 /O1 Complementary output 1 16 /O6 Complementary output 6 6 /O2 Complementary output 2 15 /O5 Complementary output 5 7 D2 Data input 2 14 D5 Data input 5 8 D3 Data input 3 13 D4 Data input 4 9 /O3 Complementary output 3 12 /O4 Complementary output 4 10 GND 11 CP Clock Pulse (active rising edge) INPUT LOADING / FAN-OUT ----------------------- Pin Names Description (U.L.) HIGH/LOW ----------- ---------------------------------------- --------------- D0 - D7 Data Inputs 0.5 / 0.375 CP Clock Pulse Input (Active Rising Edge) 0.5 / 0.375 /OE 3-State Output Enable Input (Active LOW) 0.5 / 0.375 /O0 - /O7 Complementary 3-State Outputs 25 / 12.5 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE --------------------------------------------------- Symbol Parameter Min Typ Max Units ------ -------------------------------------- --- --- --- ----- ICC Power Supply Current (All Outputs OFF) 55 mA Conditions: Vcc = Max, Dn = Gnd, /OE = 4.5 V. AC CHARACTERISTICS ------------------ Symbol Parameter Min Typ Max Units ------ -------------------------- --- --- --- ----- fmax Maximum Clock Frequency -- -- -- MHz tPLH Propagation Delay CP to On -- 5.5 -- ns tPHL Propagation Delay CP to On -- 5.5 -- ns tPZH Output Enable Time -- 6.5 -- ns tPZL Output Enable Time -- 6.5 -- ns tPHZ Output Disable Time (1) -- 5.5 -- ns tPLZ Output Disable Time (1) -- 4.5 -- ns (1) Disable times measured with CL = 5 pF. AC OPERATING REQUIREMENTS ------------------------- Symbol Parameter Min Typ Max Units ------ ---------------------------- --- --- --- ----- ts (H) Setup Time, HIGH -- Dn to CP 2.0 -- -- ns ts (L) Setup Time, LOW -- Dn to CP 2.0 -- -- ns th (H) Hold Time, HIGH -- Dn to CP 2.0 -- -- ns th (L) Hold Time, LOW -- Dn to CP 2.0 -- -- ns tw (H) CP Pulse Width, HIGH 7.0 -- -- ns tw (L) CP Pulse Width, LOW 6.0 -- -- ns