======================================================================== 74F352 DUAL 4-INPUT MULTIPLEXER (INVERTING) ======================================================================== Family: Fairchild FAST (Advanced Schottky TTL) Source: 1980 Fairchild FAST Data Book, pages 4-94 ... 4-96 Status: PRELIMINARY -- page 4-94 carries a "Preliminary" watermark. Ratings: Vcc = +5.0 V +/-5%, TA = 0 to +70 deg C DESCRIPTION ----------- The 'F352 is a very high speed dual 4-input multiplexer with Common Select inputs and individual Enable inputs for each section. It can select two bits of data from four sources. The two buffered outputs present data in the inverted (complementary) form. The 'F352 is the functional equivalent of the 'F153 except with inverted outputs. o INVERTED VERSION OF THE 'F153 o SEPARATE ENABLES FOR EACH MULTIPLEXER o INPUT CLAMP DIODE LIMITS HIGH SPEED TERMINATION EFFECTS FUNCTIONAL DESCRIPTION ---------------------- The 'F352 is a dual 4-input multiplexer. It selects two bits of data from up to four sources under the control of the common Select inputs (S0, S1). The two 4-input multiplexer circuits have individual active LOW Enables (/Ea, /Eb) which can be used to strobe the outputs independently. When the Enables (/Ea, /Eb) are HIGH, the corresponding outputs (/Za, /Zb) are forced HIGH. /Za = NOT[ /Ea * ( I0a*/S1*/S0 + I1a*/S1*S0 + I2a*S1*/S0 + I3a*S1*S0 ) ] /Zb = NOT[ /Eb * ( I0b*/S1*/S0 + I1b*/S1*S0 + I2b*S1*/S0 + I3b*S1*S0 ) ] The 'F352 can be used to move data from a group of registers to a common output bus; the particular register from which the data came would be determined by the state of the Select inputs. A less obvious application is as a function generator -- the 'F352 can generate two functions of three variables, useful for implementing highly irregular random logic. CONNECTION DIAGRAM (16-pin DIP) ------------------------------- Pin Function Pin Function --- ------------------------------- --- ------------------------------- 1 /Ea Side A Enable (active LOW) 16 Vcc 2 S1 Common Select 1 15 /Eb Side B Enable (active LOW) 3 I3a Side A data input 3 14 S0 Common Select 0 4 I2a Side A data input 2 13 I3b Side B data input 3 5 I1a Side A data input 1 12 I2b Side B data input 2 6 I0a Side A data input 0 11 I1b Side B data input 1 7 /Za Side A inverted output 10 I0b Side B data input 0 8 GND 9 /Zb Side B inverted output TRUTH TABLE (each side) ----------------------- S0 S1 /E I0 I1 I2 I3 /Z -- -- -- -- -- -- -- -- X X H X X X X H L L L L X X X H L L L H X X X L H L L X L X X H H L L X H X X L L H L X X L X H L H L X X H X L H H L X X X L H H H L X X X H L H = HIGH voltage level; L = LOW voltage level; X = immaterial. INPUT LOADING / FAN-OUT ----------------------- Pin Names Description U.L. HIGH/LOW --------- -------------------------------- ------------- I0a - I3a Side A Data Inputs 0.5 / 0.375 I0b - I3b Side B Data Inputs 0.5 / 0.375 S0, S1 Common Select Inputs 0.5 / 0.375 /Ea Side A Enable Input (Active LOW) 0.5 / 0.375 /Eb Side B Enable Input (Active LOW) 0.5 / 0.375 /Za, /Zb Multiplexer Outputs (Inverted) 25 / 12.5 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE --------------------------------------------------- Symbol Parameter Min Typ Max Units Conditions ------ -------------------- --- --- --- ----- -------------------- Icc Power Supply Current 8.0 mA Vcc = Max; VIN = Gnd AC CHARACTERISTICS ------------------ Symbol Parameter Min Typ Max Units ------ ---------------------------- --- --- --- ----- tPLH Propagation Delay Sn to /Zn -- 6.3 -- ns tPHL Propagation Delay Sn to /Zn -- 6.2 -- ns tPLH Propagation Delay /En to /Zn -- 4.6 -- ns tPHL Propagation Delay /En to /Zn -- 4.5 -- ns tPLH Propagation Delay In to /Zn -- 2.9 -- ns tPHL Propagation Delay In to /Zn -- 2.8 -- ns