======================================================================== 74F20 DUAL 4-INPUT NAND GATE ======================================================================== Family: Fairchild FAST (Advanced Schottky TTL) Source: 1980 Fairchild FAST Data Book, page 4-9 Status: PRELIMINARY -- the data sheet page carries a "Preliminary" watermark. Ratings: Vcc = +5.0 V +/-5%, TA = 0 to +70 deg C DESCRIPTION ----------- The 74F20 contains two independent 4-input NAND gates in a 14-pin package. Logic function (each gate): Z = /(A * B * C * D) (output LOW only when all four inputs are HIGH) CONNECTION DIAGRAM (14-pin DIP) ------------------------------- Pin Function Pin Function --- ------------------- --- ------------------- 1 A1 gate 1 input 14 Vcc 2 B1 gate 1 input 13 D2 gate 2 input 3 NC 12 C2 gate 2 input 4 C1 gate 1 input 11 NC 5 D1 gate 1 input 10 B2 gate 2 input 6 Z1 gate 1 output 9 A2 gate 2 input 7 GND 8 Z2 gate 2 output TRUTH TABLE (each gate) ----------------------- A B C D Z --- --- --- --- --- H H H H L any input L H H = HIGH voltage level; L = LOW voltage level. INPUT LOADING / FAN-OUT ----------------------- Pin Names Description U.L. HIGH/LOW ----------- ------------- ------------- Inputs 0.5 / 0.375 Outputs 25 / 12.5 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE --------------------------------------------------- Symbol Parameter Min Typ Max Units Conditions ------ -------------------- --- --- ---- ----- --------------------- ICCH Power Supply Current 1.4 mA VIN = Gnd, Vcc = Max ICCL Power Supply Current 5.1 mA VIN = Open, Vcc = Max AC CHARACTERISTICS ------------------ Symbol Parameter CL Min Typ Max Units ------ --------------- ----- --- --- --- ----- tPLH Propagation Dly 15 pF 1.5 2.9 3.9 ns tPLH Propagation Dly 50 pF 2.0 -- 6.0 ns tPHL Propagation Dly 15 pF 1.5 2.8 3.8 ns tPHL Propagation Dly 50 pF 2.0 -- 5.5 ns