======================================================================== 74F189 64-BIT RANDOM ACCESS MEMORY (WITH 3-STATE OUTPUTS) ======================================================================== Family: Fairchild FAST (Advanced Schottky TTL) Source: 1980 Fairchild FAST Data Book, pages 4-45 ... 4-47 Status: PRELIMINARY -- page 4-45 carries a "Preliminary" watermark. Ratings: Vcc = +5.0 V +/-5%, TA = 0 to +70 deg C DESCRIPTION ----------- The 'F189 is a high speed 64-bit RAM organized as a 16-word by 4-bit array. Address inputs are buffered to minimize loading and are fully decoded on-chip. The outputs are 3-state and are in the high impedance state whenever the Chip Select (/CS) input is HIGH. The outputs are active only in the Read mode and the output data is the complement of the stored data. o 3-state outputs for data bus applications o Buffered inputs minimize loading o Address decoding on-chip o Diode clamped inputs minimize ringing CONNECTION DIAGRAM (16-pin DIP) ------------------------------- Pin Function Pin Function --- ------------------------------ --- --------------------------- 1 A0 Address input 0 16 Vcc 2 /CS Chip Select (active LOW) 15 A1 Address input 1 3 /WE Write Enable (active LOW) 14 A2 Address input 2 4 D1 Data input 1 13 A3 Address input 3 5 /O1 Inverted data output 1 12 D4 Data input 4 6 D2 Data input 2 11 /O4 Inverted data output 4 7 /O2 Inverted data output 2 10 D3 Data input 3 8 GND 9 /O3 Inverted data output 3 FUNCTION TABLE -------------- /CS /WE Operation Condition of Outputs --- --- --------- ------------------------- L L Write High Impedance L H Read Complement of Stored Data H X Inhibit High Impedance H = HIGH voltage level; L = LOW voltage level; X = immaterial. INPUT LOADING / FAN-OUT ----------------------- Pin Names Description U.L. HIGH/LOW --------- ------------------------------- ------------- A0 - A3 Address Inputs 0.5 / 0.375 /CS Chip Select Input (Active LOW) 0.5 / 0.75 /WE Write Enable Input (Active LOW) 0.5 / 0.75 D1 - D4 Data Inputs 0.5 / 0.375 /O1 - /O4 Inverted Data Outputs 25 / 12.5 NOTE: the /CS and /WE inputs present a LOW load of 0.75 U.L., twice the 0.375 U.L. of the address and data inputs. DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE --------------------------------------------------- Symbol Parameter Min Typ Max Units Conditions ------ -------------------- --- --- --- ----- ------------------------ ICC Power Supply Current 43 mA Vcc = Max; /WE, /CS = Gnd AC CHARACTERISTICS ------------------ Symbol Parameter Min Typ Max Units ------ -------------------------------- --- --- --- ----- tPLH Access Time, HIGH -- An to /On -- 20 -- ns tPHL Access Time, LOW -- An to /On -- 20 -- ns tPZH Access Time, HIGH -- /CS to /On -- 12 -- ns tPZL Access Time, LOW -- /CS to /On -- 12 -- ns tPHZ Disable Time, HIGH -- /CS to /On -- 12 -- ns tPLZ Disable Time, LOW -- /CS to /On -- 12 -- ns tPZH Access Time, HIGH -- /WE to /On -- 12 -- ns tPZL Access Time, LOW -- /WE to /On -- 12 -- ns tPHZ Disable Time, HIGH -- /WE to /On -- 12 -- ns tPLZ Disable Time, LOW -- /WE to /On -- 12 -- ns AC OPERATING REQUIREMENTS ------------------------- Symbol Parameter Min Typ Max Units ------ ----------------------------- --- --- --- ----- ts (H) Setup Time, HIGH -- An to /WE 0 -- -- ns ts (L) Setup Time, LOW -- An to /WE 0 -- -- ns th (H) Hold Time, HIGH -- An to /WE 0 -- -- ns th (L) Hold Time, LOW -- An to /WE 0 -- -- ns ts (H) Setup Time, HIGH -- Dn to /WE 20 -- -- ns ts (L) Setup Time, LOW -- Dn to /WE 20 -- -- ns th (H) Hold Time, HIGH -- Dn to /WE 0 -- -- ns th (L) Hold Time, LOW -- Dn to /WE 0 -- -- ns ts (L) Setup Time, LOW -- /CS to /WE -- -- -- ns th (L) Hold Time, LOW -- /CS to /WE -- -- -- ns tw (L) /WE Pulse Width LOW 20 -- -- ns