======================================================================== 74F181 4-BIT ARITHMETIC LOGIC UNIT ======================================================================== Family: Fairchild FAST (Advanced Schottky TTL) Source: 1980 Fairchild FAST Data Book, pages 4-37 ... 4-40. Both the 1980 and 1985 books print the active LOW arithmetic entry for select code HHHL as "A * /B minus A"; it is given below as "A * /B plus A", which is what the active HIGH column on the same page and the Logic Diagram both give, and what the TI and National 74LS181 data sheets print. Status: Released data sheet Ratings: Vcc = +5.0 V +/-5%, TA = 0 to +70 deg C DESCRIPTION ----------- The '181 is a 4-bit Arithmetic Logic Unit (ALU) which can perform all the possible 16 logic operations on two variables and a variety of arithmetic operations. It is 40% faster than the Schottky ALU and only consumes 30% as much power. o PROVIDES 16 ARITHMETIC OPERATIONS ADD, SUBTRACT, COMPARE, DOUBLE, PLUS TWELVE OTHER ARITHMETIC OPERATIONS o PROVIDES ALL 16 LOGIC OPERATIONS OF TWO VARIABLES EXCLUSIVE-OR, COMPARE, AND, NAND, OR, NOR, PLUS TEN OTHER LOGIC OPERATIONS o FULL LOOKAHEAD FOR HIGH SPEED ARITHMETIC OPERATION ON LONG WORDS FUNCTIONAL DESCRIPTION ---------------------- The 'F181 is a 4-bit high speed parallel Arithmetic Logic Unit (ALU). Controlled by the four Function Select inputs (S0 - S3) and the Mode Control input (M), it can perform all the 16 possible logic operations or 16 different arithmetic operations on active HIGH or active LOW operands. The Function Table lists these operations. When the Mode Control input (M) is HIGH, all internal carries are inhibited and the device performs logic operations on the individual bits as listed. When the Mode Control input is LOW, the carries are enabled and the device performs arithmetic operations on the two 4-bit words. The device incorporates full internal carry lookahead and provides for either ripple carry between devices using the Cn+4 output, or for carry lookahead between packages using the signals /P (Carry Propagate) and /G (Carry Generate). In the ADD mode, /P indicates that /F is 15 or more, while /G indicates that /F is 16 or more. In the SUBTRACT mode, /P indicates that /F is zero or less, while /G indicates that /F is less than zero. /P and /G are not affected by carry in. When speed requirements are not stringent, it can be used in a simple ripple carry mode by connecting the Carry output (Cn+4) signal to the Carry input (Cn) of the next unit. For high speed operation the device is used in conjunction with a carry lookahead circuit. One carry lookahead package (the 'F182) is required for each group of four 'F181 devices. Carry lookahead can be provided at various levels and offers high speed capability over extremely long word lengths. The A = B output from the device goes HIGH when all four /F outputs are HIGH and can be used to indicate logic equivalence over four bits when the unit is in the subtract mode. The A = B output is open-collector and can be wired-AND with other A = B outputs to give a comparison for more than four bits. The A = B signal can also be used with the Cn+4 signal to indicate A > B and A < B. The Function Table lists the arithmetic operations that are performed without a carry in. An incoming carry adds a one to each operation. Thus, select code LHHL generates A minus B minus 1 (2s complement notation) without a carry in and generates A minus B when a carry is applied. Because subtraction is actually performed by complementary addition (1s complement), a carry out means /BORROW; thus a carry is generated when there is no underflow and no carry is generated when there is underflow. As indicated, this device can be used with either active LOW inputs producing active LOW outputs or with active HIGH inputs producing active HIGH outputs. For either case the table lists the operations that are performed to the operands labeled inside the logic symbol. CONNECTION DIAGRAM (24-pin DIP) ------------------------------- Pin Function Pin Function --- ------------------------ --- ---------------------------------------- 1 /B0 Operand input 24 Vcc 2 /A0 Operand input 23 /A1 3 S3 Function Select 3 22 /B1 4 S2 Function Select 2 21 /A2 5 S1 Function Select 1 20 /B2 6 S0 Function Select 0 19 /A3 7 Cn Carry input 18 /B3 8 M Mode Control input 17 /G Carry Generate output 9 /F0 Function output 16 Cn+4 Carry output 10 /F1 15 /P Carry Propagate output 11 /F2 14 A = B Comparator output (open collector) 12 GND 13 /F3 FUNCTION TABLE -------------- Arithmetic operations expressed in 2s complement notation. Active LOW operands and /Fn outputs S3 S2 S1 S0 LOGIC (M = H) ARITHMETIC ** (M = L, Cn = L) -- -- -- -- ------------- ---------------------------- L L L L /A A minus 1 L L L H /(A * B) A * B minus 1 L L H L /A + B A * /B minus 1 L L H H Logic 1 minus 1 L H L L /(A + B) A plus (A + /B) L H L H /B A * B plus (A + /B) L H H L /(A xor B) A minus B minus 1 L H H H A + /B A + /B H L L L /A * B A plus (A + B) H L L H A xor B A plus B H L H L B A * /B plus (A + B) H L H H A + B A + B H H L L Logic 0 A plus A * H H L H A * /B A * B plus A H H H L A * B A * /B plus A H H H H A A Active HIGH operands and Fn outputs S3 S2 S1 S0 LOGIC (M = H) ARITHMETIC ** (M = L, Cn = H) -- -- -- -- ------------- ---------------------------- L L L L /A A L L L H /(A + B) A + B L L H L /A * B A + /B L L H H Logic 0 minus 1 L H L L /(A * B) A plus A * /B L H L H /B (A + B) plus A * /B L H H L A xor B A minus B minus 1 L H H H A * /B A * /B minus 1 H L L L /A + B A plus A * B H L L H /(A xor B) A plus B H L H L B (A + /B) plus A * B H L H H A * B A * B minus 1 H H L L Logic 1 A plus A * H H L H A + /B (A + B) plus A H H H L A + B (A + /B) plus A H H H H A A minus 1 * Each bit is shifted to the next more significant position (i.e. a double / left shift). ** Arithmetic operations expressed in 2s complement notation. INPUT LOADING / FAN-OUT ----------------------- Pin Names Description U.L. HIGH/LOW ---------- ----------------------------------- ------------- /A0 - /A3 Operand Inputs (Active LOW) 0.5 / 1.125 /B0 - /B3 Operand Inputs (Active LOW) 0.5 / 1.125 S0 - S3 Function Select Inputs 0.5 / 1.50 M Mode Control Input 0.5 / 0.375 Cn Carry Input 0.5 / 1.875 /F0 - /F3 Function Outputs (Active LOW) 25 / 12.5 A = B Comparator Output OC* / 12.5 /G Carry Generate Output (Active LOW) 25 / 12.5 /P Carry Propagate Output (Active LOW) 25 / 12.5 Cn+4 Carry Output 25 / 12.5 * OC -- Open Collector. DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE --------------------------------------------------- Symbol Parameter Min Typ Max Units Conditions ------ -------------------------- --- --- --- ----- ---------- IOH Output HIGH Current, A = B 250 uA (1) ICC Power Supply Current 39 60 mA (2) ICC Power Supply Current 39 60 mA (3) (1) VOH = Vcc = Min (2) Vcc = Max; /Bn, Cn = Gnd; Sn, M, /An = 4.5 V (3) Vcc = Max; /An, /Bn, Cn = Gnd; M, Sn = 4.5 V AC CHARACTERISTICS ------------------ "Sum" = add mode; "Dif" = subtract mode. Symbol Propagation Delay Path Mode Min Typ Max Units ------ ---------------------- ----- --- --- ---- ----- tPLH Cn to Cn+4 2.0 5.0 6.5 ns tPHL Cn to Cn+4 2.0 5.0 6.5 ns tPLH /A or /B to Cn+4 Sum 6.0 8.5 11.5 ns tPHL /A or /B to Cn+4 Sum 6.0 9.0 11.5 ns tPLH /A or /B to Cn+4 Dif 6.0 9.0 11.5 ns tPHL /A or /B to Cn+4 Dif 6.0 9.0 11.5 ns tPLH Cn to /F Any 2.0 5.0 6.7 ns tPHL Cn to /F Any 2.0 4.5 6.0 ns tPLH /A or /B to /G Sum 2.0 4.0 7.0 ns tPHL /A or /B to /G Sum 2.0 4.0 7.0 ns tPLH /A or /B to /G Dif 2.0 5.0 7.0 ns tPHL /A or /B to /G Dif 2.0 5.0 8.0 ns tPLH /A or /B to /P Sum 2.0 4.0 6.8 ns tPHL /A or /B to /P Sum 2.0 4.0 7.5 ns tPLH /A or /B to /P Dif 3.0 5.0 7.0 ns tPHL /A or /B to /P Dif 3.0 5.0 7.5 ns tPLH /Ai or /Bi to /Fi Sum 3.0 5.5 8.0 ns tPHL /Ai or /Bi to /Fi Sum 3.0 4.5 9.0 ns tPLH /Ai or /Bi to /Fi Dif 4.0 6.0 10 ns tPHL /Ai or /Bi to /Fi Dif 4.0 5.0 10 ns tPLH Any /A or /B to any /F Sum 3.0 6.0 10 ns tPHL Any /A or /B to any /F Sum 3.0 6.0 10 ns tPLH Any /A or /B to any /F Dif 3.5 7.0 11 ns tPHL Any /A or /B to any /F Dif 3.5 7.0 11 ns tPLH /A or /B to /F Logic 3.0 5.0 8.0 ns tPHL /A or /B to /F Logic 3.0 5.0 9.0 ns tPLH /A or /B to A = B Dif 8.0 13 16 ns (4) tPHL /A or /B to A = B Dif 6.0 10 12.5 ns (4) (4) RL = 280 ohms to 5.0 V. The A = B output is open collector and requires the external pull-up shown.