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74F139          DUAL 1-OF-4 DECODER
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Family: Fairchild FAST (Advanced Schottky TTL)
Source: 1985 Fairchild FAST Data Book, pages 4-49 ... 4-52. The 1980
        data book carries the 'F139 in its Section 3 selection guide
        only (page 3-15, description and logic symbol).
Status: Released data sheet
Ratings: Vcc = +5.0 V +/-5%, TA = 0 to +70 deg C


DESCRIPTION
-----------
The 'F139 is a high-speed, dual 1-of-4 decoder/demultiplexer. The device
has two independent decoders, each accepting two inputs and providing
four mutually exclusive active LOW outputs. Each decoder has an active
LOW Enable input which can be used as a data input for a 4-output
demultiplexer. Each half of the 'F139 can be used as a function
generator providing all four minterms of two variables.

  o Multifunction Capability
  o Two Completely Independent 1-of-4 Decoders
  o Active LOW Mutually Exclusive Outputs


FUNCTIONAL DESCRIPTION
----------------------
The 'F139 is a high-speed dual 1-of-4 decoder/demultiplexer. The device
has two independent decoders, each of which accepts two binary weighted
inputs (A0-A1) and provides four mutually exclusive active LOW outputs
(/O0-/O3). Each decoder has an active LOW enable (/E). When /E is HIGH
all outputs are forced HIGH. The enable can be used as the data input
for a 4-output demultiplexer application. Each half of the 'F139
generates all four minterms of two variables. These four minterms are
useful in some applications, replacing multiple gate functions as shown
in Figure a, and thereby reducing the number of packages required in a
logic network.


CONNECTION DIAGRAM (16-pin DIP)
-------------------------------
Pin  Function                Pin  Function
---  ----------------------  ---  ----------------------
  1  /Ea    Enable a          16  Vcc
  2  A0a    Address a bit 0   15  /Eb    Enable b
  3  A1a    Address a bit 1   14  A0b    Address b bit 0
  4  /O0a   Output a 0        13  A1b    Address b bit 1
  5  /O1a   Output a 1        12  /O0b   Output b 0
  6  /O2a   Output a 2        11  /O1b   Output b 1
  7  /O3a   Output a 3        10  /O2b   Output b 2
  8  GND                       9  /O3b   Output b 3

The "a" and "b" suffixes distinguish the two independent decoders; each
has its own Enable, address and output pins, and they share only Vcc and
GND.


TRUTH TABLE (each half)
-----------------------
   Inputs         Outputs
-------------  ----------------
/E   A0   A1   /O0 /O1 /O2 /O3
---  ---  ---  --- --- --- ---
 H    X    X    H   H   H   H
 L    L    L    L   H   H   H
 L    H    L    H   L   H   H
 L    L    H    H   H   L   H
 L    H    H    H   H   H   L

H = HIGH voltage level;  L = LOW voltage level;  X = immaterial.


INPUT LOADING / FAN-OUT
-----------------------
Pin Names   Description                 U.L. HIGH/LOW
----------  --------------------------  -------------
A0, A1      Address Inputs              0.5 / 0.375
/E          Enable Inputs (Active LOW)  0.5 / 0.375
/O0 - /O3   Outputs (Active LOW)        25 / 12.5


DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
---------------------------------------------------
Symbol  Parameter             Min  Typ  Max  Units  Conditions
------  --------------------  ---  ---  ---  -----  ----------
ICC     Power Supply Current        13   20  mA     Vcc = Max


AC CHARACTERISTICS
------------------
                                              TA = +25 C   74F
                                              Vcc = +5.0V  TA/Vcc = Com
Symbol  Parameter                      CL     Min Typ Max  Min  Max   Units
------  -----------------------------  -----  --- --- ---  ---  ---   -----
tPLH    Prop Delay A0 or A1 to /On     50 pF  3.5 5.3 7.5  3.0  8.5   ns
tPHL    Prop Delay A0 or A1 to /On     50 pF  4.0 6.1 8.0  4.0  9.0   ns
tPLH    Prop Delay /E to /On           50 pF  3.5 5.4 7.0  3.5  8.0   ns
tPHL    Prop Delay /E to /On           50 pF  3.0 4.7 6.5  3.0  7.5   ns